A CMOS Ring Oscillator in 0.18um
Post by Souleymane Dembele on Jul 19, 2023
A transistor-level CMOS ring oscillator designed, simulated, and laid out in the IBM 0.18um (cmrf7sf) process for a digital/VLSI design project (TCES 421).
What it does
A ring oscillator is an odd number of CMOS inverter stages wired in a loop. I built a single inverter, turned it into a reusable symbol, and chained five of them into the oscillator. The target was 1 GHz within +/- 100 MHz at a supply under 1.8 V. With N = 5, Wn = 82 um, Wp = 264 um, and Vdd = 1.33 V, transient simulation in Cadence measured 1.06 GHz.
I then drew the full layout in Cadence Virtuoso, from the inverter cell up to the oscillator, and ran DRC and LVS to a clean (error-free) result.