An NES Emulator on FPGA

Post by Souleymane Dembele on Jun 01, 2024

A Nintendo Entertainment System emulator built in hardware on an FPGA, in Verilog, around a 6502 CPU core.

What it does

The design implements the NES around a 6502 core with custom PPU (picture) and APU (audio) modules, plus a VGA module for video output. A UART path loads game ROMs and reads joystick input, and the memory-mapping logic handles cartridge data. I verified it in Vivado/ISE and ModelSim, checking sprite rendering, frame rate, and audio synchronization.

Links

This repository is private. Request access via LinkedIn.